1. Field of the Invention
The present invention relates to microprocessors, and more particularly to microprocessors of CMOS structure having at least an execution unit and a control unit.
2. Description of Related Art
At present, there have been developed a variety of microprocessors constituted of complementary MOS (CMOS) integrated circuits in order to decrease consumption of power. Such microprocessors ordinarily have a so-called "standby" mode in which the microprocessor stands by in a ready condition capable of immediately restarting its operation whenever an restart instruction is received.
This standby mode is divided into a stop mode and a halt mode. In the stop mode, not only the execution of instructions is stopped but also the generation of clocks is stopped so as to minimize the power consumption of the processor. But, the content of data memories is held as it is so that when the processor is released from the stop mode the processor can restart to execute the instructions in the same condition as that just before the processor is brought into the stop mode. In addition, the function necessary for terminating the stop mode is maintained effective. In the halt mode, on the other hand, the clock generation is maintained but all functions excluding the function for interrupt are stopped. Ordinarily, when the processor has completed the execution of one program, it is put into the halt mode by the halt instruction generated in the processor itself. In any case, with a reset input or an interrupt request to the processor, the stop mode and the halt mode are terminated and the processor restarts its execution of instructions.
Briefly, the conventional microprocessor ordinarily comprises a control unit 1 and an execution unit 2, as shown in FIG. 1. The control unit 1 includes an instruction register or queue register 3 coupled to an internal bus 4, and an instruction decoder 5 coupled to the queue register 3 and adapted to output decoded control signals 6 to the execution unit 2. On the other hand, the execution unit 2 mainly comprises an arithmetic logic unit, an accumulator, a temporary register and others (not shown) as well-known to persons skilled in the art. If the microprocessor as mentioned above is combined with a read only memory, a random access memory and an input/output device, a microcomputer can be constituted.
As seen from FIG. 1, in the conventional microprocessor, the execution unit 2 is controlled as a whole by the instruction decoder 5, and therefore, is put in the standby mode fundamentally in accordance with the instructions.
Therefore, assuming that the aforementioned microprocessor is applied with a sequence of instructions C.sub.1, C.sub.2, E.sub.1 and C.sub.3 (where C.sub.1, C.sub.2 and C.sub.3 are control instructions and E.sub.1 is an operation instruction) as shown in FIG. 2, these instructions are sequentially executed for execution periods e.sub.1, e.sub.2, e.sub.3 and e.sub.4, respectively, and during the four periods, the execution unit 2 is maintained in operating condition, not in the standby mode. Therefore, a substantial amount of power will be consumed in the execution unit.
Turning to FIG. 3, there is shown a time chart of a program sequence for cancellation of the standby mode. In the example of FIG. 3, control instructions C.sub.1, C.sub.2 and C.sub.3 (where C.sub.3 is an interrupt instruction), an operation instruction E.sub.1 and a control instruction C.sub.4 are executed in the mentioned order for execution periods e.sub.1, e.sub.2, e.sub.3, e.sub.4 and e.sub.5. Therefore, in order to release the processor from the standby mode so that the processor can execute the operation instructions, it has been necessary to supply the interrupt instruction C.sub.3 before the operation instruction E.sub.1.
As seen from the above, the conventional microprocessor is ordinarily in a condition requiring a substantial consumption of power irrespective of whether the control instruction or the operation instruction is executed, and also, the interrupt instruction is necessary for release of the processor from the standby mode once the processor has entered the standby mode.
Particularly, the microprocessor of an ordinary scale needs an operating current of about ten and several milliamperes in an operating condition, but consumes only ten and several microamperes in the standby condition. This difference in current consumption between the operating condition and the standby condition has been recently further enlarged because the execution unit may be greatly larger than the control unit. At present, large-scaled microprocessors need an operating current of one hundred and several tens milliamperes and a power consumption of several hundreds milliwatts in the operating condition. In such microprocessors, the average power dissipation in large even in the standby mode, and therefore, the low power consumption effect which is the most attractive feature of the CMOS structure is less important, even if the power consumption itself is greatly smaller as compared with the processor of an NMOS structure having the same processing capability.
In order to further enhance the low power consumption of the CMOS structure, it is considered to construct all the CMOS circuits in the form of static circuits, so that essentially no current flows unless there is a change of data. However, it is difficult to construct the circuit by using only static circuits. This is true because a static circuit requires a larger number of transistors than that of a dynamic circuit having the same function, and microprocessors often have to include a number of dynamic circuits in order to be able to fit on the restricted area of an integrated circuit chip.